Messages in this thread | | | Date | Tue, 24 May 2022 09:30:34 -0700 | Subject | Re: [PATCH 4.9 00/25] 4.9.316-rc1 review | From | Florian Fainelli <> |
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On 5/24/22 08:06, Greg Kroah-Hartman wrote: > On Tue, May 24, 2022 at 03:55:58PM +0100, Jon Hunter wrote: >> >> On 24/05/2022 13:09, Greg Kroah-Hartman wrote: >> >> ... >> >>>> I am seeing a boot regression on tegra124-jetson-tk1 and reverting the above >>>> commit is fixing the problem. This also appears to impact linux-4.14.y, >>>> 4.19.y and 5.4.y. >>>> >>>> Test results for stable-v4.9: >>>> 8 builds: 8 pass, 0 fail >>>> 18 boots: 16 pass, 2 fail >>>> 18 tests: 18 pass, 0 fail >>>> >>>> Linux version: 4.9.316-rc1-gbe4ec3e3faa1 >>>> Boards tested: tegra124-jetson-tk1, tegra20-ventana, >>>> tegra210-p2371-2180, tegra30-cardhu-a04 >>>> >>>> Boot failures: tegra124-jetson-tk1 >>> >>> Odd. This is also in 5.10.y, right? No issues there? Are we missing >>> something? >> >> >> Actually, the more I look at this, the more I see various intermittent >> reports with this and it is also impacting the mainline. >> >> The problem is that the commit in question is causing a ton of messages to >> be printed a boot and this sometimes is causing the boot test to fail >> because the boot is taking too long. The console shows ... >> >> [ 1233.327547] CPU0: Spectre BHB: using loop workaround >> [ 1233.327795] CPU1: Spectre BHB: using loop workaround >> [ 1233.328270] CPU1: Spectre BHB: using loop workaround >> [ 1233.328700] CPU1: Spectre BHB: using loop workaround >> [ 1233.355477] CPU2: Spectre BHB: using loop workaround >> ** 7 printk messages dropped ** >> [ 1233.366271] CPU0: Spectre BHB: using loop workaround >> [ 1233.366580] CPU0: Spectre BHB: using loop workaround >> [ 1233.366815] CPU1: Spectre BHB: using loop workaround >> [ 1233.405475] CPU1: Spectre BHB: using loop workaround >> [ 1233.405874] CPU0: Spectre BHB: using loop workaround >> [ 1233.406041] CPU1: Spectre BHB: using loop workaround >> ** 1 printk messages dropped ** >> >> There is a similar report of this [0] and I believe that we need a similar >> fix for the above prints as well. I have reported this to Ard [1]. So I am >> not sure that these Spectre BHB patches are quite ready for stable. > > These patches are quite small, and just enable it for this known-broken > cpu type. > > If there is an issue enabling it for this cpu type, then we can work on > that upstream, but there shouldn't be a reason to prevent this from > being merged now, especially given that it is supposed to be fixing a > known issue.
Jonathan any chance this is Tegra specific? Our ARCH_BRCMSTB SoCs which use a Brahma-B15 which uses nearly the same ca15 processor functions defined in arch/arm/mm/proc-v7.S reports the following *before* changes:
[ 0.001641] CPU: Testing write buffer coherency: ok [ 0.001685] CPU0: Spectre v2: using ICIALLU workaround [ 0.001703] ftrace: allocating 30541 entries in 120 pages [ 0.044600] CPU0: update cpu_capacity 1024 [ 0.044633] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.044662] Setting up static identity map for 0x200000 - 0x200060 [ 0.047410] brcmstb: biuctrl: MCP: Write pairing already disabled [ 0.048974] CPU1: update cpu_capacity 1024 [ 0.048978] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.048981] CPU1: Spectre v2: using ICIALLU workaround [ 0.050234] CPU2: update cpu_capacity 1024 [ 0.050238] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002 [ 0.050241] CPU2: Spectre v2: using ICIALLU workaround [ 0.051437] CPU3: update cpu_capacity 1024 [ 0.051441] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003 [ 0.051444] CPU3: Spectre v2: using ICIALLU workaround [ 0.051532] Brought up 4 CPUs
and this *after* merging 4.9.316-rc1:
[ 0.001626] CPU: Testing write buffer coherency: ok [ 0.001670] CPU0: Spectre v2: using ICIALLU workaround [ 0.001689] CPU0: Spectre BHB: using loop workaround [ 0.001705] ftrace: allocating 30542 entries in 120 pages [ 0.043752] CPU0: update cpu_capacity 1024 [ 0.043784] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.043813] Setting up static identity map for 0x200000 - 0x200060 [ 0.046547] brcmstb: biuctrl: MCP: Write pairing already disabled [ 0.048121] CPU1: update cpu_capacity 1024 [ 0.048124] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.048129] CPU1: Spectre v2: using ICIALLU workaround [ 0.048165] CPU1: Spectre BHB: using loop workaround [ 0.049398] CPU2: update cpu_capacity 1024 [ 0.049402] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002 [ 0.049405] CPU2: Spectre v2: using ICIALLU workaround [ 0.049440] CPU2: Spectre BHB: using loop workaround [ 0.050613] CPU3: update cpu_capacity 1024 [ 0.050617] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003 [ 0.050619] CPU3: Spectre v2: using ICIALLU workaround [ 0.050653] CPU3: Spectre BHB: using loop workaround [ 0.050722] Brought up 4 CPUs [ 0.050738] SMP: Total of 4 processors activated (216.00 BogoMIPS). [ 0.050753] CPU: All CPU(s) started in HYP mode. -- Florian
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