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SubjectRe: [PATCH] drivers/pci: wait downstream hierarchy ready instead of slot itself ready, after secondary bus reset
Hi "windy.bi.enflame",

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on helgaas-pci/next]
[also build test WARNING on v5.18-rc7 next-20220516]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url: https://github.com/intel-lab-lkp/linux/commits/windy-bi-enflame/drivers-pci-wait-downstream-hierarchy-ready-instead-of-slot-itself-ready-after-secondary-bus-reset/20220517-013158
base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
config: alpha-defconfig (https://download.01.org/0day-ci/archive/20220517/202205171330.ye71SisD-lkp@intel.com/config)
compiler: alpha-linux-gcc (GCC) 11.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/99d829ca818d01cbd8bd4f95353f58a01723fe21
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review windy-bi-enflame/drivers-pci-wait-downstream-hierarchy-ready-instead-of-slot-itself-ready-after-secondary-bus-reset/20220517-013158
git checkout 99d829ca818d01cbd8bd4f95353f58a01723fe21
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=alpha SHELL=/bin/bash drivers/pci/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/pci/pci.c:5052:5: warning: no previous prototype for 'pci_bridge_secondary_bus_wait' [-Wmissing-prototypes]
5052 | int pci_bridge_secondary_bus_wait(struct pci_dev *bridge, int timeout)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~


vim +/pci_bridge_secondary_bus_wait +5052 drivers/pci/pci.c

5051
> 5052 int pci_bridge_secondary_bus_wait(struct pci_dev *bridge, int timeout)
5053 {
5054 struct pci_dev *dev;
5055 int delay = 1;
5056
5057 if (!bridge->subordinate || list_empty(&bridge->subordinate->devices))
5058 return 0;
5059
5060 list_for_each_entry(dev, &bridge->subordinate->devices, bus_list) {
5061 while (!pci_device_is_present(dev)) {
5062 if (delay > timeout) {
5063 pci_warn(dev, "secondary bus not ready after %dms\n", delay);
5064 return -ENOTTY;
5065 }
5066
5067 msleep(delay);
5068 delay *= 2;
5069 }
5070 }
5071
5072 return 0;
5073 }
5074

--
0-DAY CI Kernel Test Service
https://01.org/lkp

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