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Subject[PATCH] arch_topology: support parsing cache topology from DT
Date
From: wangqing <11112896@bbktel.com>

When ACPI is not enabled, we can parse cache topolopy from DT:
* cpu0: cpu@000 {
* next-level-cache = <&L2_1>;
* L2_1: l2-cache {
* compatible = "cache";
* next-level-cache = <&L3_1>;
* };
* L3_1: l3-cache {
* compatible = "cache";
* };
* };
*
* cpu1: cpu@001 {
* next-level-cache = <&L2_1>;
* };
* cpu2: cpu@002 {
* L2_2: l2-cache {
* compatible = "cache";
* next-level-cache = <&L3_1>;
* };
* };
*
* cpu3: cpu@003 {
* next-level-cache = <&L2_2>;
* };
cache_topology hold the pointer describing "next-level-cache",
it can describe the cache topology of every level.

Expand the use of llc_sibling when ACPI is not enabled.

Signed-off-by: Wang Qing <wangqing@vivo.com>
---
drivers/base/arch_topology.c | 63 +++++++++++++++++++++++++++++++++--
include/linux/arch_topology.h | 3 ++
2 files changed, 64 insertions(+), 2 deletions(-)

diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c
index 1d6636ebaac5..d633184429f2 100644
--- a/drivers/base/arch_topology.c
+++ b/drivers/base/arch_topology.c
@@ -647,6 +647,64 @@ static int __init parse_dt_topology(void)
}
#endif

+/*
+ * cpu cache topology table
+ */
+#define MAX_CACHE_LEVEL 7
+struct device_node *cache_topology[NR_CPUS][MAX_CACHE_LEVEL];
+
+void init_cpu_cache_topology(void)
+{
+ struct device_node *node_cpu, *node_cache;
+ int cpu;
+ int level = 0;
+
+ for_each_possible_cpu(cpu) {
+ node_cpu = of_get_cpu_node(cpu, NULL);
+ if (!node_cpu)
+ continue;
+
+ level = 0;
+ node_cache = node_cpu;
+ while (level < MAX_CACHE_LEVEL) {
+ node_cache = of_parse_phandle(node_cache, "next-level-cache", 0);
+ if (!node_cache)
+ break;
+
+ cache_topology[cpu][level++] = node_cache;
+ }
+ of_node_put(node_cpu);
+ }
+}
+
+bool cpu_share_llc(int cpu1, int cpu2)
+{
+ int cache_level;
+
+ for (cache_level = MAX_CACHE_LEVEL - 1; cache_level > 0; cache_level--) {
+ if (!cache_topology[cpu1][cache_level])
+ continue;
+
+ if (cache_topology[cpu1][cache_level] == cache_topology[cpu2][cache_level])
+ return true;
+
+ return false;
+ }
+
+ return false;
+}
+
+bool cpu_share_l2c(int cpu1, int cpu2)
+{
+ if (!cache_topology[cpu1][0])
+ return false;
+
+ if (cache_topology[cpu1][0] == cache_topology[cpu2][0])
+ return true;
+
+ return false;
+}
+
/*
* cpu topology table
*/
@@ -662,7 +720,7 @@ const struct cpumask *cpu_coregroup_mask(int cpu)
/* not numa in package, lets use the package siblings */
core_mask = &cpu_topology[cpu].core_sibling;
}
- if (cpu_topology[cpu].llc_id != -1) {
+ if (cpu_topology[cpu].llc_id != -1 || cache_topology[cpu][0]) {
if (cpumask_subset(&cpu_topology[cpu].llc_sibling, core_mask))
core_mask = &cpu_topology[cpu].llc_sibling;
}
@@ -684,7 +742,8 @@ void update_siblings_masks(unsigned int cpuid)
for_each_online_cpu(cpu) {
cpu_topo = &cpu_topology[cpu];

- if (cpuid_topo->llc_id == cpu_topo->llc_id) {
+ if ((cpuid_topo->llc_id != -1 && cpuid_topo->llc_id == cpu_topo->llc_id)
+ || (cpuid_topo->llc_id == -1 && cpu_share_llc(cpu, cpuid))) {
cpumask_set_cpu(cpu, &cpuid_topo->llc_sibling);
cpumask_set_cpu(cpuid, &cpu_topo->llc_sibling);
}
diff --git a/include/linux/arch_topology.h b/include/linux/arch_topology.h
index 58cbe18d825c..df670d5fc03b 100644
--- a/include/linux/arch_topology.h
+++ b/include/linux/arch_topology.h
@@ -86,6 +86,7 @@ extern struct cpu_topology cpu_topology[NR_CPUS];
#define topology_cluster_cpumask(cpu) (&cpu_topology[cpu].cluster_sibling)
#define topology_llc_cpumask(cpu) (&cpu_topology[cpu].llc_sibling)
void init_cpu_topology(void);
+void init_cpu_cache_topology(void);
void store_cpu_topology(unsigned int cpuid);
const struct cpumask *cpu_coregroup_mask(int cpu);
const struct cpumask *cpu_clustergroup_mask(int cpu);
@@ -93,6 +94,8 @@ void update_siblings_masks(unsigned int cpu);
void remove_cpu_topology(unsigned int cpuid);
void reset_cpu_topology(void);
int parse_acpi_topology(void);
+bool cpu_share_llc(int cpu1, int cpu2);
+bool cpu_share_l2c(int cpu1, int cpu2);
#endif

#endif /* _LINUX_ARCH_TOPOLOGY_H_ */
--
2.27.0.windows.1
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