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SubjectRe: [PATCH V3 12/17] dt-binding: mt8192: Add infra_ao reset bit
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On 22/04/2022 08:01, Rex-BC Chen wrote:
> To support reset of infra_ao, add the bit definition for thermal/PCIe/SVS.
>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> ---
> include/dt-bindings/reset/mt8192-resets.h | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/include/dt-bindings/reset/mt8192-resets.h b/include/dt-bindings/reset/mt8192-resets.h
> index be9a7ca245b9..d5f3433175c1 100644
> --- a/include/dt-bindings/reset/mt8192-resets.h
> +++ b/include/dt-bindings/reset/mt8192-resets.h
> @@ -27,4 +27,14 @@
>
> #define MT8192_TOPRGU_SW_RST_NUM 23
>
> +/* INFRA RST0 */
> +#define MT8192_INFRA_RST0_LVTS_AP_RST 0
> +/* INFRA RST2 */
> +#define MT8192_INFRA_RST2_PCIE_PHY_RST 15
> +/* INFRA RST3 */
> +#define MT8192_INFRA_RST3_PTP_RST 5
> +/* INFRA RST4 */
> +#define MT8192_INFRA_RST4_LVTS_MCU 12
> +#define MT8192_INFRA_RST4_PCIE_TOP 1

These should be the IDs of reset, not some register values/offsets.
Therefore it is expected to have them incremented by 1.


> +
> #endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8192 */


Best regards,
Krzysztof

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