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SubjectRe: [PATCH V3 11/17] dt-bindings: arm: mediatek: Add #reset-cells property for MT8192-sys-clock
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On 22/04/2022 08:01, Rex-BC Chen wrote:
> We will use the infra_ao reset which is defined in mt8192-sys-clock.
> The maximum value of reset-cells is 2. Therefore, we add this patch to
> define it.

Remove entire last sentence, does not make sense in the commit.

>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> ---
> .../bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml
> index 5705bcf1fe47..28ebcecc8258 100644
> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml
> @@ -29,6 +29,9 @@ properties:
> '#clock-cells':
> const: 1
>
> + '#reset-cells':
> + maximum: 2

Why this is a maximum? Usually this is const, so how do you use it (with
what values)?

> +
> required:
> - compatible
> - reg


Best regards,
Krzysztof

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