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SubjectRe: [PATCH v4] perf/x86/amd: Don't touch the Host-only bit inside the guest hypervisor
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On Fri, 1 Apr 2022 15:06:27 +0200, Peter Zijlstra wrote:
> If SVM enter/exit don't twiddle with counter EN bits, how is all this
> supposed to work consistently then?

Since KVM currently does not support the "Host/Guest Only" bits (41:40),
CPU wide events created on L1 HV will always count L1 HV and L2, so no
twiddle counter EN bits are needed when {dis,en}abling SVM on L1 HV.

This #GP warning is because KVM does not allow guest to set HO/GO bit,
It has been fixed in this commit 9b026073db2f
("KVM: x86/svm: Clear reserved bits written to PerfEvtSeln MSRs")
and has been merged to 5.18-rc1.

Because the commit df51fe7ea1c1c
("perf/x86/amd: Don't touch the AMD64_EVENTSEL_HOSTONLY bit inside the guest")
is to fix a very similar problem caused by the same reason,
I think it should be revert now, it make things obscure.

And perf_ctr_virt_mask is used to mask Host-Only bit when SVM is disabled,
Using it on a guest doesn't make sense and make things obscure.

I wrote a patch to clarifies what perf_ctr_virt_mask does.

Regards,
Dongli

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