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SubjectRe: [PATCH 2/3] dt-bindings: clock: Document MA35D1 clock controller bindings
On Thu, Mar 31, 2022 at 10:42:55AM +0800, Jacky Huang wrote:
> Add documentation to describe Nuvoton MA35D1 clock driver bindings.
>
> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
> ---
> .../bindings/clock/nuvoton,ma35d1-clk.yaml | 59 +++++++++++++++++++
> 1 file changed, 59 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> new file mode 100644
> index 000000000000..bf5474b10420
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> @@ -0,0 +1,59 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/nuvoton,ma35d1-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nuvoton MA35D1 Clock Control Module Binding
> +
> +maintainers:
> + - Chi-Fang Li <cfli0@nuvoton.com>
> + - Jacky Huang <ychuang3@nuvoton.com>
> +
> +description: |
> + The MA35D1 clock controller generates clocks for the whole chip,
> + including system clocks and all peripheral clocks.
> +
> + See also:
> + dt-bindings/clock/ma35d1-clk.h
> +
> +properties:
> + compatible:
> + const: nuvoton,ma35d1-clk
> +
> + reg:
> + maxItems: 1
> +
> + "#clock-cells":
> + const: 1
> +
> + clocks:
> + maxItems: 1
> +
> + assigned-clocks:
> + maxItems: 4

These aren't usually in the clock controller...

> +
> + assigned-clock-rates:
> + maxItems: 4
> +
> + clock-pll-mode:
> + maxItems: 4

What's this? Not a standard property. Needs a type, description, and
vendor prefix.

> +
> +required:
> + - compatible
> + - reg
> + - "#clock-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + # clock control module node:
> + - |
> + #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
> +
> + clk: clock-controller@40460200 {
> + compatible = "nuvoton,ma35d1-clk";
> + reg = <0x40460200 0x100>;
> + #clock-cells = <1>;
> + };
> +...
> --
> 2.30.2
>
>

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