| Date | Wed, 23 Mar 2022 18:15:35 +0100 | Subject | Re: [PATCH v4 01/22] arm64: dts: mt8192: Add pwrap node | From | Matthias Brugger <> |
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On 18/03/2022 15:45, Allen-KH Cheng wrote: > Add pwrap node for mt8192 SoC. > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Applied
Thanks
> --- > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > index 411feb294613..76428599444e 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > @@ -523,6 +523,18 @@ > clock-names = "clk13m"; > }; > > + pwrap: pwrap@10026000 { > + compatible = "mediatek,mt6873-pwrap"; > + reg = <0 0x10026000 0 0x1000>; > + reg-names = "pwrap"; > + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 0>; > + clocks = <&infracfg CLK_INFRA_PMIC_AP>, > + <&infracfg CLK_INFRA_PMIC_TMR>; > + clock-names = "spi", "wrap"; > + assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>; > + assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>; > + }; > + > scp_adsp: clock-controller@10720000 { > compatible = "mediatek,mt8192-scp_adsp"; > reg = <0 0x10720000 0 0x1000>;
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