Messages in this thread | | | From | Doug Anderson <> | Date | Thu, 17 Mar 2022 17:11:58 -0700 | Subject | Re: [PATCH v6 1/5] drm/msm/disp/dpu1: set mdp clk to the maximum frequency in opp table during probe |
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Hi,
On Mon, Mar 14, 2022 at 7:47 AM Vinod Polimera <quic_vpolimer@quicinc.com> wrote: > > use max clock during probe/bind sequence from the opp table. > The clock will be scaled down when framework sends an update. > > Fixes: 25fdd5933("drm/msm: Add SDM845 DPU support")
The "Fixes:" format is a little wrong. Should have more digits and a space before the parenthesis. AKA:
Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
> Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8 ++++++++ > 1 file changed, 8 insertions(+)
This looks good to me now other than the bad Fixes tag. I presume you'll want to spin with the extra verbosity in the CL description that Stephen asked for, though.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
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