| Date | Tue, 22 Feb 2022 15:10:34 -0500 | From | Nícolas F. R. A. Prado <> | Subject | Re: [PATCH v2 06/23] arm64: dts: mt8192: Add usb-phy node |
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On Fri, Feb 18, 2022 at 05:16:16PM +0800, Allen-KH Cheng wrote: > Add xhci node for mt8192 SoC. > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> > --- > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 25 ++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > index 61aadd7bd397..ce18d692175f 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > @@ -875,6 +875,31 @@ > #clock-cells = <1>; > }; > > + u3phy0: usb-phy@11e40000 {
According to Documentation/devicetree/bindings/phy/mediatek,tphy.yaml, this node should be called t-phy. Only the child nodes should be usb-phy.
> + compatible = "mediatek,mt8192-tphy", > + "mediatek,generic-tphy-v2"; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + status = "okay";
"okay" is already the default status, so you can drop this line, as well as the ones on the child nodes below.
> + > + u2port0: usb-phy@11e40000 { > + reg = <0 0x11e40000 0 0x700>; > + clocks = <&clk26m>; > + clock-names = "ref"; > + #phy-cells = <1>; > + status = "okay"; > + }; > + > + u3port0: usb-phy@11e40700 { > + reg = <0 0x11e40700 0 0x900>; > + clocks = <&clk26m>; > + clock-names = "ref"; > + #phy-cells = <1>; > + status = "okay"; > + }; > + }; > + > i2c0: i2c@11f00000 { > compatible = "mediatek,mt8192-i2c"; > reg = <0 0x11f00000 0 0x1000>, > -- > 2.18.0 > >
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