lkml.org 
[lkml]   [2022]   [Dec]   [20]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH v3 07/11] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator

On Tue, 20 Dec 2022 08:50:50 +0800, Hal Feng wrote:
> From: Emil Renner Berthing <kernel@esmil.dk>
>
> Add bindings for the system clock and reset generator (SYSCRG) on the
> JH7110 RISC-V SoC by StarFive Ltd.
>
> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> ---
> .../clock/starfive,jh7110-syscrg.yaml | 80 +++++++
> MAINTAINERS | 8 +-
> .../dt-bindings/clock/starfive,jh7110-crg.h | 207 ++++++++++++++++++
> .../dt-bindings/reset/starfive,jh7110-crg.h | 142 ++++++++++++
> 4 files changed, 434 insertions(+), 3 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
> create mode 100644 include/dt-bindings/clock/starfive,jh7110-crg.h
> create mode 100644 include/dt-bindings/reset/starfive,jh7110-crg.h
>

Reviewed-by: Rob Herring <robh@kernel.org>

\
 
 \ /
  Last update: 2023-03-26 23:16    [W:0.298 / U:0.484 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site