Messages in this thread | | | Date | Fri, 2 Dec 2022 17:09:09 +0000 | From | Sean Christopherson <> | Subject | Re: [RFC 8/9] RISC-V: KVM: Implement perf support |
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On Mon, Jul 18, 2022, Atish Patra wrote: > RISC-V SBI PMU & Sscofpmf ISA extension allows supporting perf in > the virtualization enviornment as well. KVM implementation > relies on SBI PMU extension for most of the part while traps > & emulates the CSRs read for counter access.
For the benefit of non-RISCV people, the changelog (and documentation?) should explain why RISC-V doesn't need to tap into kvm_register_perf_callbacks(). Presumably there's something in the "RISC-V SBI PMU & Sscofpmf ISA extension" spec that allows hardware to differentiate between events that are for guest vs. host?
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