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SubjectRe: [PATCH 1/3] x86/tsx: Add feature bit for TSX control MSR support
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On 9/12/22 16:39, Pawan Gupta wrote:
> Support for TSX control MSR is enumerated in MSR_IA32_ARCH_CAPABILITIES.
> This is different from how other CPU features are enumerated i.e. via
> CPUID. Enumerating support for TSX control currently has an overhead of
> reading the MSR every time which can be avoided.

I only see tsx_ctrl_is_supported() getting called in three places:

> 1 tsx.c tsx_clear_cpuid 138 } else if (tsx_ctrl_is_supported()) {
> 2 tsx.c tsx_dev_mode_disable 161 if (!boot_cpu_has_bug(X86_BUG_TAA) || !tsx_ctrl_is_supported() ||
> 3 tsx.c tsx_init 194 if (!tsx_ctrl_is_supported()) {

Those all look like boot-time things to me. Why does the overhead matter?

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