lkml.org 
[lkml]   [2022]   [Nov]   [28]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
SubjectRe: [PATCH v2 04/12] riscv: dts: allwinner: Add the D1/D1s SoC devicetree
Date
Am Samstag, 26. November 2022, 00:46:48 CET schrieb Samuel Holland:
> D1 (aka D1-H), D1s (aka F133), R528, and T113 are a family of SoCs based
> on a single die, or at a pair of dies derived from the same design.
>
> D1 and D1s contain a single T-HEAD Xuantie C906 CPU, whereas R528 and
> T113 contain a pair of Cortex-A7's. D1 and R528 are the full version of
> the chip with a BGA package, whereas D1s and T113 are low-pin-count QFP
> variants.
>
> Because the original design supported both ARM and RISC-V CPUs, some
> peripherals are duplicated. In addition, all variants except D1s contain
> a HiFi 4 DSP with its own set of peripherals.
>
> The devicetrees are organized to minimize duplication:
> - Common perhiperals are described in sunxi-d1s-t113.dtsi
> - DSP-related peripherals are described in sunxi-d1-t113.dtsi
> - RISC-V specific hardware is described in sun20i-d1s.dtsi
> - Functionality unique to the D1 variant is described in sun20i-d1.dtsi
>
> The SOC_PERIPHERAL_IRQ macro handles the different #interrupt-cells
> values between the ARM (GIC) and RISC-V (PLIC) versions of the SoC.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>

While the overall dt looks good to me, it seems others did find
some minor issues. But I can at least provide a

Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu>

as it could sucessfully boot the Nezha variant of boards for me.


Heiko


\
 
 \ /
  Last update: 2022-11-28 22:01    [W:0.208 / U:0.096 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site