Messages in this thread | | | Subject | Re: [PATCH v5 7/8] KVM: VMX: Update PID-pointer table entry when APIC ID is changed | From | Tom Lendacky <> | Date | Wed, 5 Jan 2022 13:13:46 -0600 |
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On 12/31/21 8:28 AM, Zeng Guang wrote: > In xAPIC mode, guest is allowed to modify APIC ID at runtime. > If IPI virtualization is enabled, corresponding entry in > PID-pointer table need change accordingly. > > Signed-off-by: Zeng Guang <guang.zeng@intel.com> > --- > arch/x86/include/asm/kvm_host.h | 1 + > arch/x86/kvm/lapic.c | 7 +++++-- > arch/x86/kvm/vmx/vmx.c | 12 ++++++++++++ > 3 files changed, 18 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h > index 2164b9f4c7b0..753bf2a7cebc 100644 > --- a/arch/x86/include/asm/kvm_host.h > +++ b/arch/x86/include/asm/kvm_host.h > @@ -1493,6 +1493,7 @@ struct kvm_x86_ops { > int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err); > > void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector); > + void (*update_ipiv_pid_entry)(struct kvm_vcpu *vcpu, u8 old_id, u8 new_id); > }; > > struct kvm_x86_nested_ops { > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c > index 3ce7142ba00e..83c2c7594bcd 100644 > --- a/arch/x86/kvm/lapic.c > +++ b/arch/x86/kvm/lapic.c > @@ -2007,9 +2007,12 @@ int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val) > > switch (reg) { > case APIC_ID: /* Local APIC ID */ > - if (!apic_x2apic_mode(apic)) > + if (!apic_x2apic_mode(apic)) { > + u8 old_id = kvm_lapic_get_reg(apic, APIC_ID) >> 24; > + > kvm_apic_set_xapic_id(apic, val >> 24); > - else > + kvm_x86_ops.update_ipiv_pid_entry(apic->vcpu, old_id, val >> 24);
Won't this blow up on AMD since there is no corresponding SVM op?
Thanks, Tom
> + } else > ret = 1; > break; > > diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c > index 2e65464d6dee..f21ce15c5eb8 100644 > --- a/arch/x86/kvm/vmx/vmx.c > +++ b/arch/x86/kvm/vmx/vmx.c > @@ -7633,6 +7633,17 @@ static void vmx_vm_destroy(struct kvm *kvm) > free_pages((unsigned long)kvm_vmx->pid_table, MAX_PID_TABLE_ORDER); > } > > +static void vmx_update_ipiv_pid_entry(struct kvm_vcpu *vcpu, u8 old_id, u8 new_id) > +{ > + if (enable_ipiv && kvm_vcpu_apicv_active(vcpu)) { > + u64 *pid_table = to_kvm_vmx(vcpu->kvm)->pid_table; > + > + WRITE_ONCE(pid_table[old_id], 0); > + WRITE_ONCE(pid_table[new_id], __pa(&to_vmx(vcpu)->pi_desc) | > + PID_TABLE_ENTRY_VALID); > + } > +} > + > static struct kvm_x86_ops vmx_x86_ops __initdata = { > .name = "kvm_intel", > > @@ -7770,6 +7781,7 @@ static struct kvm_x86_ops vmx_x86_ops __initdata = { > .complete_emulated_msr = kvm_complete_insn_gp, > > .vcpu_deliver_sipi_vector = kvm_vcpu_deliver_sipi_vector, > + .update_ipiv_pid_entry = vmx_update_ipiv_pid_entry, > }; > > static __init void vmx_setup_user_return_msrs(void) >
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