Messages in this thread | | | Date | Sun, 23 Jan 2022 11:44:44 +0100 | From | Borislav Petkov <> | Subject | [GIT PULL] perf/urgent for v5.17-rc2 |
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Hi Linus,
please pull perf/urgent for v5.17-rc2.
Thx.
---
The following changes since commit fb3b0673b7d5b477ed104949450cd511337ba3c6:
Merge tag 'mailbox-v5.17' of git://git.linaro.org/landing-teams/working/fujitsu/integration (2022-01-13 11:19:07 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git tags/perf_urgent_for_v5.17_rc2
for you to fetch changes up to 8c16dc047b5dd8f7b3bf4584fa75733ea0dde7dc:
x86/perf: Avoid warning for Arch LBR without XSAVE (2022-01-18 12:09:49 +0100)
---------------------------------------------------------------- - Add support for accessing the general purpose counters on Alder Lake via MMIO
- Add new LBR format v7 support which is v5 modulo TSX
- Fix counter enumeration on Alder Lake hybrids
- Overhaul how context time updates are done and get rid of perf_event::shadow_ctx_time.
- The usual amount of fixes: event mask correction, supported event types reporting, etc.
---------------------------------------------------------------- Andi Kleen (1): x86/perf: Avoid warning for Arch LBR without XSAVE
Kan Liang (2): perf/x86/intel: Add a quirk for the calculation of the number of counters on Alder Lake perf/x86/intel/uncore: Add IMC uncore support for ADL
Peter Zijlstra (1): perf: Fix perf_event_read_local() time
Peter Zijlstra (Intel) (2): perf/x86/intel/lbr: Support LBR format V7 perf/x86/intel/lbr: Add static_branch for LBR INFO flags
Stephane Eranian (1): perf/x86/rapl: fix AMD event handling
Zhengjun Xing (1): perf/x86/intel/uncore: Fix CAS_COUNT_WRITE issue for ICX
arch/x86/events/intel/core.c | 15 ++ arch/x86/events/intel/lbr.c | 168 ++++++++++++--------- arch/x86/events/intel/uncore.c | 2 +- arch/x86/events/intel/uncore.h | 3 +- arch/x86/events/intel/uncore_discovery.c | 4 +- arch/x86/events/intel/uncore_discovery.h | 2 + arch/x86/events/intel/uncore_snb.c | 214 ++++++++++++++++++++++++++- arch/x86/events/intel/uncore_snbep.c | 2 +- arch/x86/events/perf_event.h | 10 +- arch/x86/events/rapl.c | 9 +- include/linux/perf_event.h | 15 +- kernel/events/core.c | 246 ++++++++++++++++++------------- 12 files changed, 501 insertions(+), 189 deletions(-)
-- Regards/Gruss, Boris.
SUSE Software Solutions Germany GmbH, GF: Ivo Totev, HRB 36809, AG Nürnberg
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