lkml.org 
[lkml]   [2021]   [Sep]   [5]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Date
Subject[PATCH] x86/tsx: clear RTM and HLE when MSR_IA32_TSX_CTRL is not supported
If hypervisor does not support MSR_IA32_TSX_CTRL, but guest supports
RTM and HLE features, it will affect TAA mitigation.

Signed-off-by: Peng Hao <flyingpeng@tencent.com>
---
arch/x86/kernel/cpu/tsx.c | 7 +++++++
1 file changed, 7 insertions(+)

diff --git a/arch/x86/kernel/cpu/tsx.c b/arch/x86/kernel/cpu/tsx.c
index 9c7a5f049292..5e852c14fef2 100644
--- a/arch/x86/kernel/cpu/tsx.c
+++ b/arch/x86/kernel/cpu/tsx.c
@@ -122,6 +122,13 @@ void __init tsx_init(void)

if (!tsx_ctrl_is_supported()) {
tsx_ctrl_state = TSX_CTRL_NOT_SUPPORTED;
+
+ /* If hypervisor does not support MSR_IA32_TSX_CTRL emulation,
+ * but guest supports RTM and HLE features, it will affect TAA
+ * (tsx_async_abort)mitigation.
+ */
+ setup_clear_cpu_cap(X86_FEATURE_RTM);
+ setup_clear_cpu_cap(X86_FEATURE_HLE);
return;
}

--
2.27.0
\
 
 \ /
  Last update: 2021-09-06 04:47    [W:0.121 / U:0.288 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site