Messages in this thread | | | Subject | Re: [PATCH] clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gates | From | Stephen Boyd <> | Date | Sat, 28 Aug 2021 22:24:12 -0700 |
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Quoting Sergio Paracuellos (2021-07-26 22:55:37) > 'clk_init_data' for gates is setting up 'CLK_IS_CRITICAL' > flag for all of them. This was being doing because some > drivers of this SoC might not be ready to use the clock > and we don't wanted the kernel to disable them since default > behaviour without clock driver was to set all gate bits to > enabled state. After a bit more testing and checking driver > code it is safe to remove this flag and just let the kernel > to disable those gates that are not in use. No regressions > seems to appear. > > Fixes: 48df7a26f470 ("clk: ralink: add clock driver for mt7621 SoC") > Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> > ---
Applied to clk-next
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