Messages in this thread | | | From | Vidya Sagar <> | Subject | Query regarding the use of pcie-designware-plat.c file | Date | Wed, 9 Jun 2021 00:52:37 +0530 |
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Hi, I would like to know what is the use of pcie-designware-plat.c file. This looks like a skeleton file and can't really work with any specific hardware as such. Some context for this mail thread is, if the config CONFIG_PCIE_DW_PLAT is enabled in a system where a Synopsys DesignWare IP based PCIe controller is present and its configuration is enabled (Ex:- Tegra194 system with CONFIG_PCIE_TEGRA194_HOST enabled), then, it can so happen that the probe of pcie-designware-plat.c called first (because all DWC based PCIe controller nodes have "snps,dw-pcie" compatibility string) and can crash the system. One solution to this issue is to remove the "snps,dw-pcie" from the compatibility string (as was done through the commit f9f711efd441 ("arm64: tegra: Fix Tegra194 PCIe compatible string") but it seems like a localized fix for Tegra194 where the issue potentially is global, as in, the crash can happen on any platform. So, wondering if the config option CONFIG_PCIE_DW_PLAT can be removed altogether for pcie-designware-plat.c?
Thanks, Vidya Sagar
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