Messages in this thread | | | From | Alison Schofield <> | Subject | [PATCH v3 0/2] CXL ACPI tables for object creation | Date | Wed, 16 Jun 2021 18:11:06 -0700 |
| |
Jonathan - I updated Patch 2 so I didn't keep your Reviewed-by tag.
Changes since v2 [1]: - Warn and continue, rather than error out, on these acpi table parsing issues: table length mismatch for either CHBS or CFMWS; duplicate uid's for CHBS. (Ben, Jonathan) - Update flow in cxl_acpi_match_chbs() (Ben, Jonathan) - Improve naming cedt_table->acpi_cedt, cedt_base->cedt_subtable (Ben) - Emit debug message only if CFMWS is greater than its expected length (Ben) - Update the dev_err messages wrt the CFMWS expected length failure. - Remove blank line before error handling block (Jonathan) - Rebase to the CXL pending branch [2]
[1]: https://lore.kernel.org/linux-cxl/cover.1623800340.git.alison.schofield@intel.com/ [2]: https://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git/log/?h=pending
-- Parse the ACPI CXL Early Discovery Table (CEDT) and use the CHBS & CFMWS when creating port and decoder objects.
CHBS: CXL Host Bridge Structure - Patch 1 CFMWS: CXL Fixed Memory Window Structure - Patch 2
Alison Schofield (2): cxl/acpi: Add the Host Bridge base address to CXL port objects cxl/acpi: Use the ACPI CFMWS to create static decoder objects
drivers/cxl/acpi.c | 217 +++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 212 insertions(+), 5 deletions(-)
base-commit: 21083f51521fb0f60dbac591f175c3ed48435af4 -- 2.26.2
| |