Messages in this thread | | | Date | Tue, 01 Jun 2021 14:44:57 +0200 | From | Michael Walle <> | Subject | Re: [PATCH v2 6/6] mtd: spi-nor: core: avoid odd length/address writes in 8D-8D-8D mode |
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Am 2021-05-31 20:17, schrieb Pratyush Yadav: > On Octal DTR capable flashes like Micron Xcella the writes cannot start > or end at an odd address in Octal DTR mode. Extra 0xff bytes need to be > appended or prepended to make sure the start address and end address > are > even. 0xff is used because on NOR flashes a program operation can only > flip bits from 1 to 0, not the other way round. 0 to 1 flip needs to > happen via erases. > > Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Michael Walle <michael@walle.cc>
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