Messages in this thread | | | From | Yazen Ghannam <> | Subject | [PATCH 00/25] AMD MCA Address Translation Updates | Date | Fri, 7 May 2021 15:01:15 -0400 |
| |
From: Yazen Ghannam <yazen.ghannam@amd.com>
This patchset refactors the AMD MCA Address Translation code and adds support for newer systems. This patchset was written from scratch compared to previous patchsets.
The reference code was recently refactored in preparation for updates for future systems. These patches try to follow the reference code as closely as possible. I also tried to address comments from previous patchset reviews.
Patches 1-24 do the refactor without adding new system support. The goal is to break down the translation algorithm into smaller chunks. There are some simple wrapper functions defined. These will be filled in when supporting newer systems. The intention is that new system support can be added without any major refactor. I tried to make a patch for each logical change. There's a bit of churn so as to not break the build with each change. I think many of these patches can be squashed together, if desired. The top level function was split first, then the next level of functions, etc. in a somewhat breadth-first approach.
Patch 25 adds support for systems with Data Fabric version 3 (Rome and later).
Each patch was build tested individually. The entire set was functionally tested with the following modes.
Naples: No interleaving Channel interleaving Die interleaving Socket interleaving
Rome: No interleaving Nodes-per-Socket 0 (NPS0) Nodes-per-Socket 1 (NPS1) Nodes-per-Socket 2 (NPS2) Nodes-per-Socket 4 (NPS4) NPS2 w/o hashing NPS4 w/o hashing
Thanks, Yazen
Link: https://lkml.kernel.org/r/20200903200144.310991-1-Yazen.Ghannam@amd.com
Yazen Ghannam (25): x86/MCE/AMD: Don't use naked values for DF registers x86/MCE/AMD: Add context struct x86/MCE/AMD: Define functions for DramOffset x86/MCE/AMD: Define function to read DRAM address map registers x86/MCE/AMD: Define function to find interleaving mode x86/MCE/AMD: Define function to denormalize address x86/MCE/AMD: Define function to add DRAM base and hole x86/MCE/AMD: Define function to dehash address x86/MCE/AMD: Define function to check DRAM limit address x86/MCE/AMD: Remove goto statements x86/MCE/AMD: Simplify function parameters x86/MCE/AMD: Define function to get Interleave Address Bit x86/MCE/AMD: Skip denormalization if no interleaving x86/MCE/AMD: Define function to get number of interleaved channels x86/MCE/AMD: Define function to get number of interleaved dies x86/MCE/AMD: Define function to get number of interleaved sockets x86/MCE/AMD: Remove unnecessary assert x86/MCE/AMD: Define function to make space for CS ID x86/MCE/AMD: Define function to calculate CS ID x86/MCE/AMD: Define function to insert CS ID into address x86/MCE/AMD: Define function to get CS Fabric ID x86/MCE/AMD: Define function to find shift and mask values x86/MCE/AMD: Update CS ID calculation to match reference code x86/MCE/AMD: Match hash function to reference code x86/MCE/AMD: Add support for address translation on DF3 systems
arch/x86/include/asm/amd_nb.h | 7 +- arch/x86/include/asm/mce.h | 5 +- arch/x86/kernel/amd_nb.c | 6 +- arch/x86/kernel/cpu/mce/amd.c | 681 +++++++++++++++++++++++++++------- drivers/edac/amd64_edac.c | 4 +- 5 files changed, 555 insertions(+), 148 deletions(-)
-- 2.25.1
| |