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SubjectRe: [PATCH v5 28/28] x86/fpu/amx: Clear the AMX state when appropriate
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On 5/23/21 8:13 PM, Andy Lutomirski wrote:
>> + /*
>> + * Since the current task's state is safely in the XSAVE buffer, TILERELEASE
>> + * the TILE registers to guarantee that dirty state will not interfere with the
>> + * hardware's ability to enter the core C6 idle state.
>> + */
>> + if (fpu->state_mask & XFEATURE_MASK_XTILE_DATA)
>> + tile_release();
>> return 1;
>> }
>>
>>
> This looks wrong -- you should also invalidate the state. And doing it
> in the save path seems inefficient.
>
> Can we do this just when going idle?

Chang, you might also want to talk with folks that do scheduler
performance work (I've cc'd Tim). I know we're always fighting to trim
down the idle and wakeup paths. There might be no other alternative,
but unconditionally forcing an AMX XRSTOR on return from idle might be
considered nasty.

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