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Subject[PATCH v2 0/5] Map register blocks individually
Date
From: Ira Weiny <ira.weiny@intel.com>

Changes for v2:
Incorporate feedback from Dan
Ensure memory blocks are individually reserved as well as mapped
Remove pci device management in favor of lower level device management
Drop version checking
Reorder patches
Update commit messages

Some hardware implementations mix component and device registers into the same
BAR and the driver stack is going to have independent mapping implementations
for those 2 cases. Furthermore, it will be nice to have finer grained mappings
should user space want to map some register blocks.

Unfortunately, the information for the register blocks is contained inside the
BARs themselves. Which means the BAR must be mapped, probed, and unmapped
prior to the registers being mapped individually.

The series starts by introducing the helper function
cxl_decode_register_block(). Then breaks out region reservation and register
mapping. Separates mapping the registers into a probe stage and mapping stage.
The probe stage creates list of register blocks which is then iterated to map
the individual register blocks.

Once mapping is performed in 2 steps the pci device management is removed and
the resource reservation can be done per register block as well.

Finally, the mapping the HDM decoder register block is added.


Ben Widawsky (1):
cxl: Add HDM decoder capbilities

Ira Weiny (4):
cxl/mem: Introduce cxl_decode_register_block()
cxl/mem: Reserve all device regions at once
cxl/mem: Map registers based on capabilities
cxl/mem: Reserve individual register block regions

drivers/cxl/core.c | 182 +++++++++++++++++++++++++++++++++++++++++----
drivers/cxl/cxl.h | 98 +++++++++++++++++++++---
drivers/cxl/pci.c | 168 ++++++++++++++++++++++++++++++++---------
drivers/cxl/pci.h | 1 +
4 files changed, 388 insertions(+), 61 deletions(-)

--
2.28.0.rc0.12.gb6a658bd00c9

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