Messages in this thread | | | From | Michael Walle <> | Subject | [PATCH v4 0/4] mtd: spi-nor: otp: 4 byte mode fix and erase support | Date | Fri, 21 May 2021 21:40:30 +0200 |
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This series is the follow up on the single patch mtd: spi-nor: implement OTP erase for Winbond and similar flashes
Pratyush Yadav discovered a likely problem with bigger flashes, the address to access the security registers is either 3 or 4 byte (at least for winbond flashes).
Changes since v3: - new patch to check for read-only OTP regions before writing - clarify term "security register" - don't combine lock and erase functions anymore. there are now more difference than similarities.
Changes since v2: - fix 3/4 byte mode access - use spi_nor_erase_sector() by swapping the nor->erase_opcode - use more consistent wording regarding the security registers
Changes since v1: - fixed kernel doc
Michael Walle (4): mtd: spi-nor: otp: fix access to security registers in 4 byte mode mtd: spi-nor: otp: use more consistent wording mtd: spi-nor: otp: return -EROFS if region is read-only mtd: spi-nor: otp: implement erase for Winbond and similar flashes
drivers/mtd/spi-nor/core.c | 2 +- drivers/mtd/spi-nor/core.h | 4 + drivers/mtd/spi-nor/otp.c | 147 +++++++++++++++++++++++++++++++--- drivers/mtd/spi-nor/winbond.c | 1 + 4 files changed, 143 insertions(+), 11 deletions(-)
-- 2.20.1
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