Messages in this thread | | | From | Heiko Stuebner <> | Subject | Re: [PATCH v1] clk: rockchip: Optimize PLL table memory usage | Date | Fri, 14 May 2021 14:05:56 +0200 |
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On Tue, 11 May 2021 17:07:26 +0800, Elaine@vger.kernel.org wrote: > Before the change: The sizeof rk3568_pll_rates = 2544 > Use union: The sizeof rk3568_pll_rates = 1696 > > In future Soc, more PLL types will be added, and the > rockchip_pll_rate_table will add more members, > and the space savings will be even more pronounced > by using union.
Applied, thanks!
[1/1] clk: rockchip: Optimize PLL table memory usage commit: 23029150a05b59ebacca6dd76f6c14dc67a95877
Best regards, -- Heiko Stuebner <heiko@sntech.de>
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