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SubjectRE: [PATCH v3 1/2] PCI: xilinx-nwl: Enable coherent PCIe DMA traffic using CCI
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Thanks Lorenzo.

> -----Original Message-----
> From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Sent: Wednesday, April 7, 2021 9:32 PM
> To: linux-pci@vger.kernel.org; Bharat Kumar Gogada <bharatku@xilinx.com>;
> linux-kernel@vger.kernel.org
> Cc: lorenzo.pieralisi@arm.com; bhelgaas@google.com
> Subject: Re: [PATCH v3 1/2] PCI: xilinx-nwl: Enable coherent PCIe DMA traffic
> using CCI
>
> On Mon, 22 Feb 2021 14:17:31 +0530, Bharat Kumar Gogada wrote:
> > Add support for routing PCIe DMA traffic coherently when Cache
> > Coherent Interconnect (CCI) is enabled in the system.
> > The "dma-coherent" property is used to determine if CCI is enabled or
> > not.
> > Refer to https://developer.arm.com/documentation/ddi0470/k/preface
> > for the CCI specification.
>
> Applied to pci/xilinx, thanks!
>
> [1/2] PCI: xilinx-nwl: Enable coherent PCIe DMA traffic using CCI
> https://git.kernel.org/lpieralisi/pci/c/213e122052
> [2/2] PCI: xilinx-nwl: Add optional "dma-coherent" property
> https://git.kernel.org/lpieralisi/pci/c/1c4422f226
>
> Thanks,
> Lorenzo

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