Messages in this thread Patch in this message | | | From | Bharat Kumar Gogada <> | Subject | [PATCH v3 2/2] PCI: xilinx-nwl: Add optional "dma-coherent" property | Date | Mon, 22 Feb 2021 14:17:32 +0530 |
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Add optional dma-coherent property to support coherent PCIe DMA traffic.
Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> --- Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt b/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt index 01bf7fdf4c19..2d677e90a7e2 100644 --- a/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt +++ b/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt @@ -33,6 +33,8 @@ Required properties: - #address-cells: specifies the number of cells needed to encode an address. The value must be 0. +Optional properties: +- dma-coherent: present if DMA operations are coherent Example: ++++++++ -- 2.17.1
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