Messages in this thread Patch in this message | | | From | Zhiqiang Hou <> | Subject | [PATCHv5 5/6] arm64: dts: ls1043a: Add SCFG phandle for PCIe nodes | Date | Wed, 7 Apr 2021 11:09:47 +0800 |
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From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
The LS1043A PCIe controller has some control registers in SCFG block, so add the SCFG phandle for each PCIe controller DT node.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> --- V5: - No change
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi index 46826752a691..704e9e249729 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi @@ -875,6 +875,7 @@ interrupts = <0 118 0x4>, /* controller interrupt */ <0 117 0x4>; /* PME interrupt */ interrupt-names = "intr", "pme"; + fsl,pcie-scfg = <&scfg 0>; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; @@ -902,6 +903,7 @@ interrupts = <0 128 0x4>, <0 127 0x4>; interrupt-names = "intr", "pme"; + fsl,pcie-scfg = <&scfg 1>; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; @@ -929,6 +931,7 @@ interrupts = <0 162 0x4>, <0 161 0x4>; interrupt-names = "intr", "pme"; + fsl,pcie-scfg = <&scfg 2>; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; -- 2.17.1
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