Messages in this thread | | | From | Li Yang <> | Date | Thu, 11 Nov 2021 15:21:37 -0600 | Subject | Re: [PATCHv5 0/6] PCI: layerscape: Add power management support |
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On Wed, Apr 7, 2021 at 9:13 AM Zhiqiang Hou <Zhiqiang.Hou@nxp.com> wrote: > > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > This patch series is to add PCIe power management support for NXP > Layerscape platforms. > > Hou Zhiqiang (6): > PCI: layerscape: Change to use the DWC common link-up check function > dt-bindings: pci: layerscape-pci: Add a optional property big-endian > arm64: dts: layerscape: Add big-endian property for PCIe nodes > dt-bindings: pci: layerscape-pci: Update the description of SCFG > property > arm64: dts: ls1043a: Add SCFG phandle for PCIe nodes > PCI: layerscape: Add power management support > > .../bindings/pci/layerscape-pci.txt | 6 +- > .../arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 1 + > .../arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 6 + > .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 3 + > drivers/pci/controller/dwc/pci-layerscape.c | 450 ++++++++++++++---- > drivers/pci/controller/dwc/pcie-designware.h | 1 + > 6 files changed, 370 insertions(+), 97 deletions(-)
Hi Bjorn,
I don't see any feedback on this version. Is there any chance that the binding/driver changes can be picked up?
Regards, Leo
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