Messages in this thread | | | Date | Wed, 31 Mar 2021 16:38:46 +0100 | From | Will Deacon <> | Subject | Re: [PATCH v6 02/10] arm64: perf: Enable PMU counter direct access for perf event |
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On Tue, Mar 30, 2021 at 04:08:11PM -0500, Rob Herring wrote: > On Tue, Mar 30, 2021 at 12:09 PM Rob Herring <robh@kernel.org> wrote: > > On Tue, Mar 30, 2021 at 10:31 AM Will Deacon <will@kernel.org> wrote: > > > The logic here feels like it > > > could with a bit of untangling. > > > > Yes, I don't love it, but couldn't come up with anything better. It is > > complicated by the fact that flags have to be set before we assign the > > counter and can't set/change them when we assign the counter. It would > > take a lot of refactoring with armpmu code to fix that. > > How's this instead?: > > if (armv8pmu_event_want_user_access(event) || !armv8pmu_event_is_64bit(event)) > event->hw.flags |= ARMPMU_EL0_RD_CNTR; > > /* > * At this point, the counter is not assigned. If a 64-bit counter is > * requested, we must make sure the h/w has 64-bit counters if we set > * the event size to 64-bit because chaining is not supported with > * userspace access. This may still fail later on if the CPU cycle > * counter is in use. > */ > if (armv8pmu_event_is_64bit(event) && > (!armv8pmu_event_want_user_access(event) || > armv8pmu_has_long_event(cpu_pmu) || (hw_event_id == > ARMV8_PMUV3_PERFCTR_CPU_CYCLES))) > event->hw.flags |= ARMPMU_EVT_64BIT;
I thought there were some cases where we could assign cycles event to an event counter; does that not happen anymore?
Will
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