Messages in this thread Patch in this message | | | From | Adam Ford <> | Subject | [PATCH] soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock active | Date | Sat, 20 Nov 2021 13:39:16 -0600 |
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Enable the vpu-h1 clock when the domain is active because reading or writing to the VPU-H1 IP block cause the system to hang.
Fixes: 656ade7aa42a ("soc: imx: gpcv2: keep i.MX8M* bus clocks enabled") Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index b8d52d8d29db..7b6dfa33dcb9 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -734,6 +734,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = { .map = IMX8MM_VPUH1_A53_DOMAIN, }, .pgc = BIT(IMX8MM_PGC_VPUH1), + .keep_clocks = true, }, [IMX8MM_POWER_DOMAIN_DISPMIX] = { -- 2.32.0
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