Messages in this thread | | | Subject | Re: [PATCH v3 06/13] net: phy: add qca8081 read_status | From | Jie Luo <> | Date | Tue, 19 Oct 2021 20:48:18 +0800 |
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On 10/19/2021 8:31 PM, Andrew Lunn wrote: > On Tue, Oct 19, 2021 at 08:10:15PM +0800, Jie Luo wrote: >> On 10/19/2021 5:42 AM, Andrew Lunn wrote: >>>> +static int qca808x_read_status(struct phy_device *phydev) >>>> +{ >>>> + int ret; >>>> + >>>> + ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT); >>>> + if (ret < 0) >>>> + return ret; >>>> + >>>> + linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->lp_advertising, >>>> + ret & MDIO_AN_10GBT_STAT_LP2_5G); >>>> + >>> Could genphy_c45_read_lpa() be used here? >>> >>> Andrew >> Hi Andrew, >> >> Thanks for the comments, the MDIO_STAT1 of PHY does not follow the >> standard, bit0~bit6 of MDIO_STAT1 are >> >> always 0, genphy_c45_read_lpa can't be used. > O.K. It is a shame the hardware partially follow the standard, but > breaks it as well. Why go to the effort of partially following it, > when you don't gain anything from it because you need custom code > anyway? > > Andrew
Hi Andrew,
Thanks for the suggestion. qca8081 PHY indeed add 2.5G capability based on the
general 1G PHY, i will feedback this to the HW design team, thanks for this comments.
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