| Date | Wed, 27 Jan 2021 09:58:15 +0000 | From | Marc Zyngier <> | Subject | Re: [PATCH V3 10/14] arm64: nvhe: Allow TRBE access at EL1 |
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On 2021-01-27 08:55, Anshuman Khandual wrote: > From: Suzuki K Poulose <suzuki.poulose@arm.com> > > When the kernel is booted at EL2 in a nvhe configuration, > enable the TRBE access to the EL1. The EL1 still can't trace > EL2, unless EL2 permits explicitly via TRFCR_EL2.E2TRE. > > Cc: Will Deacon <will@kernel.org> > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Marc Zyngier <maz@kernel.org> > Cc: Mark Rutland <mark.rutland@arm.com> > cc: Anshuman Khandual <anshuman.khandual@arm.com> > Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> > Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Acked-by: Marc Zyngier <maz@kernel.org>
One comment below, though:
> --- > arch/arm64/include/asm/el2_setup.h | 19 +++++++++++++++++++ > arch/arm64/include/asm/kvm_arm.h | 2 ++ > 2 files changed, 21 insertions(+) > > diff --git a/arch/arm64/include/asm/el2_setup.h > b/arch/arm64/include/asm/el2_setup.h > index a7f5a1b..05ecce9 100644 > --- a/arch/arm64/include/asm/el2_setup.h > +++ b/arch/arm64/include/asm/el2_setup.h > @@ -72,6 +72,25 @@ > .endif > > 3: > + > +.ifeqs "\mode", "nvhe" > + /* > + * If the Trace Buffer is available, allow > + * the EL1 to own it. Note that EL1 cannot > + * trace the EL2, as it is prevented by > + * TRFCR_EL2.E2TRE == 0. > + */ > + ubfx x0, x1, #ID_AA64DFR0_TRBE_SHIFT, #4 > + cbz x0, 1f > + > + mrs_s x0, SYS_TRBIDR_EL1 > + and x0, x0, TRBIDR_PROG > + cbnz x0, 1f > + mov x0, #(MDCR_EL2_E2TB_EL1_OWN << MDCR_EL2_E2TB_SHIFT) > + orr x2, x2, x0 > +.endif > + > +1:
Note that this will (badly) conflict with the late-VHE patches[1], where this code path has been reworked.
Thanks,
M.
[1] https://lore.kernel.org/r/20210125105019.2946057-1-maz@kernel.org -- Jazz is not dead. It just smells funny...
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