Messages in this thread | | | Date | Mon, 28 Sep 2020 15:03:28 +0200 | From | Thierry Reding <> | Subject | Re: [PATCH v3 03/15] phy: tegra: xusb: Move usb3 port init for Tegra210 |
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On Wed, Sep 09, 2020 at 04:10:29PM +0800, JC Kuo wrote: > The programming sequence in tegra210_usb3_port_enable() is required > for both cold boot and SC7 exit, and must be performed only after > PEX/SATA UPHY is initialized. Therefore, this commit moves the > programming sequence to tegra210_usb3_phy_power_on(). PCIE/SATA phy > .power_on() stub will invoke tegra210_usb3_phy_power_on() if the lane > is assigned for XUSB super-speed. > > Signed-off-by: JC Kuo <jckuo@nvidia.com> > --- > v3: > new, was a part of "phy: tegra: xusb: Rearrange UPHY init on Tegra210" > > drivers/phy/tegra/xusb-tegra210.c | 298 +++++++++++++++++------------- > drivers/phy/tegra/xusb.c | 2 +- > drivers/phy/tegra/xusb.h | 2 + > 3 files changed, 174 insertions(+), 128 deletions(-)
I'm a bit unhappy about the repeated calls to tegra_xusb_lane_check(), but I don't have any great ideas on how to improve this, so:
Acked-by: Thierry Reding <treding@nvidia.com> [unhandled content-type:application/pgp-signature] | |