| Date | Tue, 14 Jul 2020 10:27:01 +0200 | From | Peter Zijlstra <> | Subject | Re: [RFC PATCH 04/15] x86/pks: Preserve the PKRS MSR on context switch |
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On Tue, Jul 14, 2020 at 12:02:09AM -0700, ira.weiny@intel.com wrote: > From: Ira Weiny <ira.weiny@intel.com> > > The PKRS MSR is defined as a per-core register. This isolates memory > access by CPU. Unfortunately, the MSR is not preserved by XSAVE. > Therefore, We must preserve the protections for individual tasks even if > they are context switched out and placed on another cpu later.
This is a contradiction and utter trainwreck. We're not going to do more per-core MSRs and pretend they make sense per-task.
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