Messages in this thread | | | Subject | Re: [RFC PATCH bpf-next 3/3] bpf, arm64: Optimize ADD,SUB,JMP BPF_K using arm64 add/sub immediates | From | Daniel Borkmann <> | Date | Thu, 7 May 2020 22:22:07 +0200 |
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On 5/7/20 3:05 AM, Luke Nelson wrote: > The current code for BPF_{ADD,SUB} BPF_K loads the BPF immediate to a > temporary register before performing the addition/subtraction. Similarly, > BPF_JMP BPF_K cases load the immediate to a temporary register before > comparison. > > This patch introduces optimizations that use arm64 immediate add, sub, > cmn, or cmp instructions when the BPF immediate fits. If the immediate > does not fit, it falls back to using a temporary register. > > Example of generated code for BPF_ALU64_IMM(BPF_ADD, R0, 2): > > without optimization: > > 24: mov x10, #0x2 > 28: add x7, x7, x10 > > with optimization: > > 24: add x7, x7, #0x2 > > The code could use A64_{ADD,SUB}_I directly and check if it returns > AARCH64_BREAK_FAULT, similar to how logical immediates are handled. > However, aarch64_insn_gen_add_sub_imm from insn.c prints error messages > when the immediate does not fit, and it's simpler to check if the > immediate fits ahead of time. > > Co-developed-by: Xi Wang <xi.wang@gmail.com> > Signed-off-by: Xi Wang <xi.wang@gmail.com> > Signed-off-by: Luke Nelson <luke.r.nels@gmail.com>
Same here:
Acked-by: Daniel Borkmann <daniel@iogearbox.net>
Thanks!
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