Messages in this thread | | | Subject | Re: [RFC PATCH bpf-next 2/3] bpf, arm64: Optimize AND,OR,XOR,JSET BPF_K using arm64 logical immediates | From | Daniel Borkmann <> | Date | Thu, 7 May 2020 22:19:35 +0200 |
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On 5/7/20 3:05 AM, Luke Nelson wrote: > The current code for BPF_{AND,OR,XOR,JSET} BPF_K loads the immediate to > a temporary register before use. > > This patch changes the code to avoid using a temporary register > when the BPF immediate is encodable using an arm64 logical immediate > instruction. If the encoding fails (due to the immediate not being > encodable), it falls back to using a temporary register. > > Example of generated code for BPF_ALU32_IMM(BPF_AND, R0, 0x80000001): > > without optimization: > > 24: mov w10, #0x8000ffff > 28: movk w10, #0x1 > 2c: and w7, w7, w10 > > with optimization: > > 24: and w7, w7, #0x80000001 > > Since the encoding process is quite complex, the JIT reuses existing > functionality in arch/arm64/kernel/insn.c for encoding logical immediates > rather than duplicate it in the JIT. > > Co-developed-by: Xi Wang <xi.wang@gmail.com> > Signed-off-by: Xi Wang <xi.wang@gmail.com> > Signed-off-by: Luke Nelson <luke.r.nels@gmail.com>
Great find, thanks! Given Will wanted to queue them:
Acked-by: Daniel Borkmann <daniel@iogearbox.net>
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