Messages in this thread | | | Subject | Re: [PATCH v7 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC | From | "Ramuthevar, Vadivel MuruganX" <> | Date | Mon, 18 May 2020 19:39:22 +0800 |
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Hi Arnd, Andy,
On 15/5/2020 10:30 pm, Arnd Bergmann wrote: > On Fri, May 15, 2020 at 4:25 PM Andy Shevchenko > <andy.shevchenko@gmail.com> wrote: >> >> On Fri, May 15, 2020 at 4:48 PM kbuild test robot <lkp@intel.com> wrote: >> >>> sparse warnings: (new ones prefixed by >>) >>> >>>>> drivers/mtd/nand/raw/intel-nand-controller.c:441:24: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int val @@ got restricted __be32 [assignedunsigned int val @@ >>>>> drivers/mtd/nand/raw/intel-nand-controller.c:441:24: sparse: expected unsigned int val >>>>> drivers/mtd/nand/raw/intel-nand-controller.c:441:24: sparse: got restricted __be32 [assigned] [usertype] reg >>> drivers/mtd/nand/raw/intel-nand-controller.c:444:24: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int val @@ got restricted __be32 [assignedunsigned int val @@ >>> drivers/mtd/nand/raw/intel-nand-controller.c:444:24: sparse: expected unsigned int val >>> drivers/mtd/nand/raw/intel-nand-controller.c:444:24: sparse: got restricted __be32 [assigned] [usertype] reg >>> >>> 440 reg = cpu_to_be32(*pdata++); >>> > 441 writel(reg, ebu_host->hsnand + HSNAND_CMSG_0); >>> 442 >>> 443 reg = cpu_to_be32(*pdata); >>> 444 writel(reg, ebu_host->hsnand + HSNAND_CMSG_1); >> >> On BE: >> cpu_to_be32 -> no-op >> writel() -> converts reg to LE >> >> On LE: >> cpu_to_be32 -> converts to BE >> writel() -> no-op (in terms of conversion) >> >> Seems to me that the proper API (if above is intended) should be swab32(). >> But something tells me that above is broken (or my understanding is wrong). > > iowrite_be32() is the correct way to store word into a big-endian mmio register, > if that is the intention here. Thank you for suggestions to use iowrite32be(), it suits exactly.
Regards Vadivel
> > Arnd >
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