Messages in this thread | | | From | Andy Shevchenko <> | Date | Fri, 15 May 2020 17:27:19 +0300 | Subject | Re: [PATCH v7 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC |
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On Fri, May 15, 2020 at 5:25 PM Andy Shevchenko <andy.shevchenko@gmail.com> wrote: > On Fri, May 15, 2020 at 4:48 PM kbuild test robot <lkp@intel.com> wrote:
> > 440 reg = cpu_to_be32(*pdata++); > > > 441 writel(reg, ebu_host->hsnand + HSNAND_CMSG_0); > > 442 > > 443 reg = cpu_to_be32(*pdata); > > 444 writel(reg, ebu_host->hsnand + HSNAND_CMSG_1); > > On BE: > cpu_to_be32 -> no-op > writel() -> converts reg to LE > > On LE: > cpu_to_be32 -> converts to BE > writel() -> no-op (in terms of conversion) > > Seems to me that the proper API (if above is intended) should be swab32(). > But something tells me that above is broken (or my understanding is wrong).
And perhaps it should use lo_hi_writeq() or something like that.
-- With Best Regards, Andy Shevchenko
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