Messages in this thread Patch in this message | | | Date | Sat, 18 Apr 2020 10:54:50 -0000 | From | "tip-bot2 for Tony Luck" <> | Subject | [tip: x86/urgent] x86/split_lock: Add Tremont family CPU models |
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The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: 8b9a18a9f2494144fe23fe630d0734310fa65301 Gitweb: https://git.kernel.org/tip/8b9a18a9f2494144fe23fe630d0734310fa65301 Author: Tony Luck <tony.luck@intel.com> AuthorDate: Thu, 16 Apr 2020 13:57:54 -07:00 Committer: Thomas Gleixner <tglx@linutronix.de> CommitterDate: Sat, 18 Apr 2020 12:48:44 +02:00
x86/split_lock: Add Tremont family CPU models
Tremont CPUs support IA32_CORE_CAPABILITIES bits to indicate whether specific SKUs have support for split lock detection.
Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20200416205754.21177-4-tony.luck@intel.com
--- arch/x86/kernel/cpu/intel.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index c23ad48..a19a680 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -1135,6 +1135,9 @@ void switch_to_sld(unsigned long tifn) static const struct x86_cpu_id split_lock_cpu_ids[] __initconst = { X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, 0), X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, 0), + X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, 1), + X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, 1), + X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, 1), {} };
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