Messages in this thread | | | From | Thomas Gleixner <> | Subject | Re: [PATCH 2/3] x86/split_lock: Bits in IA32_CORE_CAPABILITIES are not architectural | Date | Fri, 17 Apr 2020 00:06:47 +0200 |
| |
Tony Luck <tony.luck@intel.com> writes: > The Intel Software Developers' Manual erroneously listed bit 5 of the > IA32_CORE_CAPABILITIES register as an architectural feature. It is > not.
TBH. I'm really pissed off by that. We ask Intel for the past 20 years that this non-enumerability and model checking has to stop.
Especially for the split lock festure we got assured that the Icelakes are the only models which need the cpu match because it was too late to add the capability bit.
> Features enumerated by IA32_CORE_CAPABILITIES are model specific and > implementation details may vary in different cpu models. Thus it is only > safe to trust features after checking the CPU model.
What's the point of the IA32_CORE_CAPABILITIES check if we need a model match to figure out whether IA32_CORE_CAPABILITIES bit 5 is valid to enumerate split lock detection?
IOW, are we going to see CPUs which end up in the match list and have bit 5 cleared in IA32_CORE_CAPABILITIES?
Thanks,
tglx
| |