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SubjectRe: [PATCH v2 0/2] pci: Add boot interrupt quirk mechanism for Xeon chipsets
On Thu, Feb 20, 2020 at 11:29:28AM -0800, Sean V Kelley wrote:
> Changes since v1 [1]:
>
> - Correct Documentation section title for 6300ESB chipset.
> (Jonathan Derrick)
>
> - Use consistent abbreviations in comments for IO-APIC and Core IO.
> (Andy Shevchenko)
>
> - Retained Reviewed-by tag due to no technical changes.
>
> [1]: https://lore.kernel.org/lkml/20200214213313.66622-1-sean.v.kelley@linux.intel.com/
>
> Bjorn, I'm open for it to go to stable as well.
>
> --
>
> When IRQ lines on secondary or higher IO-APICs are masked (e.g.,
> Real-Time threaded interrupts), many chipsets redirect IRQs on
> this line to the legacy PCH and in turn the base IO-APIC in the
> system. The unhandled interrupts on the base IO-APIC will be
> identified by the Linux kernel as Spurious Interrupts and can
> lead to disabled IRQ lines.
>
> Disabling this legacy PCI interrupt routing is chipset-specific and
> varies in mechanism between chipset vendors and across generations.
> In some cases the mechanism is exposed to BIOS but not all BIOS
> vendors chose to pick it up. With the increasing usage of RT as it
> marches towards mainline, additional issues have been raised with
> more recent Xeon chipsets.
>
> This patchset disables the boot interrupt on these Xeon chipsets where
> this is possible with an additional mechanism. In addition, this
> patchset includes documentation covering the background of this quirk.
>
>
> Sean V Kelley (2):
> pci: Add boot interrupt quirk mechanism for Xeon chipsets
> Documentation:PCI: Add background on Boot Interrupts
>
> Documentation/PCI/boot-interrupts.rst | 153 ++++++++++++++++++++++++++
> Documentation/PCI/index.rst | 1 +
> drivers/pci/quirks.c | 80 ++++++++++++--
> 3 files changed, 227 insertions(+), 7 deletions(-)
> create mode 100644 Documentation/PCI/boot-interrupts.rst

Applied to pci/interrupts for v5.7. I added a stable tag.

Thanks a lot; this is really a nice piece of work!

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