lkml.org 
[lkml]   [2020]   [Dec]   [20]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH 2/6] dt-bindings: clk: mstar msc313 mpll binding description
From
Date
Quoting Daniel Palmer (2020-12-19 22:35:41)
> Hi Stephen,
>
> On Sun, 20 Dec 2020 at 12:39, Stephen Boyd <sboyd@kernel.org> wrote:
> > > + clock-output-names:
> > > + minItems: 8
> > > + maxItems: 8
> > > + description: |
> > > + This should provide a name for the internal PLL clock and then
> > > + a name for each of the divided outputs.
> >
> > Is this necessary?
>
> I found without the names specified in the dt probing of muxes that
> depend on the outputs but appear earlier didn't work.
> Also this same PLL layout seems to be used in some other places so
> eventually I was thinking this driver would get used for those PLLs
> with different output names.

Still seems like it could be auto-generated based on dev_name() +
number. Now that we have a way to specify clk parents via the clocks
property in DT (without any clock-names required) we should be able to
avoid needing clock-output-names in general.

\
 
 \ /
  Last update: 2020-12-20 19:46    [W:0.091 / U:1.440 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site