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SubjectRE: [PATCH v4 0/4] x86/bus_lock: Enable bus lock detection
Date
Hi, Dear maintainers,

> A bus lock [1] is acquired through either split locked access to writeback (WB)
> memory or any locked access to non-WB memory. This is typically >1000
> cycles slower than an atomic operation within a cache line. It also disrupts
> performance on other cores.

...

> Change Log:
> v4:
> - Fix a ratelimit wording issue in the doc (Randy).
> - Patch 4 is acked by Randy (Randy).

Friendly reminder about this series...

Thank you very much in advance for your time!

-Fenghua

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