Messages in this thread | | | Date | Sun, 15 Nov 2020 11:19:36 -0800 | From | Moritz Fischer <> | Subject | Re: [PATCHv1 4/4] fpga: stratix10-soc: entend driver for bitstream authentication |
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On Thu, Nov 12, 2020 at 12:06:43PM -0600, richard.gong@linux.intel.com wrote: > From: Richard Gong <richard.gong@intel.com> > > Exten FPGA manager driver to support FPGA bitstream authentication on Nit: Extend > Intel SocFPGA platforms. > > Signed-off-by: Richard Gong <richard.gong@intel.com> > --- > drivers/fpga/stratix10-soc.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/fpga/stratix10-soc.c b/drivers/fpga/stratix10-soc.c > index 657a70c..8a59365 100644 > --- a/drivers/fpga/stratix10-soc.c > +++ b/drivers/fpga/stratix10-soc.c > @@ -185,7 +185,10 @@ static int s10_ops_write_init(struct fpga_manager *mgr, > ctype.flags = 0; > if (info->flags & FPGA_MGR_PARTIAL_RECONFIG) { > dev_dbg(dev, "Requesting partial reconfiguration.\n"); > - ctype.flags |= BIT(COMMAND_RECONFIG_FLAG_PARTIAL); > + ctype.flags |= FPGA_MGR_PARTIAL_RECONFIG; I think we had this discussion during the original review of the stratix10-soc driver?
Wasn't the point of using the BIT() to not assume alignment of FPGA_MGR flags and firmware structure?
The FPGA_MGR_* bits are kernel internal and can therefore change, it would be unfortunate to end up in a situation where this breaks the FW interface (assuming firmware uses the value in pass-through which it looks like is what is happening).
> + } else if (info->flags & FPGA_MGR_BITSTREM_AUTHENTICATION) { > + dev_dbg(dev, "Requesting bitstream authentication.\n"); > + ctype.flags |= FPGA_MGR_BITSTREM_AUTHENTICATION; Do you want to change this to BIT(COMMAND_AUTHENTICATE_BITSTREAM) or something like that? > } else { > dev_dbg(dev, "Requesting full reconfiguration.\n"); > } > -- > 2.7.4 >
Thanks, Moritz
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