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SubjectRe: [RESEND PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB
On Tue, Oct 06, 2020 at 03:23:46PM +0200, Bert Vermeulen wrote:
> If a flash chip has more than 16MB capacity but its BFPT reports
> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>
> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
> did get set. This fixes that check.
>
> Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
> Signed-off-by: Bert Vermeulen <bert@biot.com>
> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
> drivers/mtd/spi-nor/core.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)

<formletter>

This is not the correct way to submit patches for inclusion in the
stable kernel tree. Please read:
https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html
for how to do this properly.

</formletter>

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