Messages in this thread | | | Date | Tue, 6 Oct 2020 20:48:07 +0530 | From | Pratyush Yadav <> | Subject | Re: [RESEND PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB |
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On 06/10/20 03:23PM, Bert Vermeulen wrote: > If a flash chip has more than 16MB capacity but its BFPT reports > BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3. > > The check in spi_nor_set_addr_width() doesn't catch it because addr_width > did get set. This fixes that check. > > Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths") > Signed-off-by: Bert Vermeulen <bert@biot.com> > Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> > --- > drivers/mtd/spi-nor/core.c | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c > index 0369d98b2d12..a2c35ad9645c 100644 > --- a/drivers/mtd/spi-nor/core.c > +++ b/drivers/mtd/spi-nor/core.c > @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor) > /* already configured from SFDP */ > } else if (nor->info->addr_width) { > nor->addr_width = nor->info->addr_width; > - } else if (nor->mtd.size > 0x1000000) { > - /* enable 4-byte addressing if the device exceeds 16MiB */ > - nor->addr_width = 4; > } else { > nor->addr_width = 3; > } > > + if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) { Nitpick: ^^^^^^^^^^^^^^^^^^^^^^^^ you can drop this part. But its fine either way.
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
> + /* enable 4-byte addressing if the device exceeds 16MiB */ > + nor->addr_width = 4; > + } > + > if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) { > dev_dbg(nor->dev, "address width is too large: %u\n", > nor->addr_width);
-- Regards, Pratyush Yadav Texas Instruments India
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