Messages in this thread | | | From | Doug Anderson <> | Date | Mon, 6 Jan 2020 13:53:41 -0800 | Subject | Re: [PATCH] ARM: dts: rockchip: Use ABI name for write protect pin on veyron fievel/tiger |
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Hi,
On Mon, Jan 6, 2020 at 1:52 PM Matthias Kaehlcke <mka@chromium.org> wrote: > > The flash write protect pin is currently named 'FW_WP_AP', which is > how the signal is called in the schematics. The Chrome OS ABI > requires the pin to be named 'AP_FLASH_WP_L', which is also how > it is called on all other veyron devices. Rename the pin to match > the ABI. > > Signed-off-by: Matthias Kaehlcke <mka@chromium.org> > --- > > arch/arm/boot/dts/rk3288-veyron-fievel.dts | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-)
Reviewed-by: Douglas Anderson <dianders@chromium.org>
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