Messages in this thread | | | Subject | Re: [PATCH v2] powerpc: slightly improve cache helpers | From | Christophe Leroy <> | Date | Tue, 9 Jul 2019 07:04:43 +0200 |
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Le 08/07/2019 à 21:14, Nathan Chancellor a écrit : > On Mon, Jul 08, 2019 at 11:19:30AM +1000, Michael Ellerman wrote: >> On Fri, 2019-05-10 at 09:24:48 UTC, Christophe Leroy wrote: >>> Cache instructions (dcbz, dcbi, dcbf and dcbst) take two registers >>> that are summed to obtain the target address. Using 'Z' constraint >>> and '%y0' argument gives GCC the opportunity to use both registers >>> instead of only one with the second being forced to 0. >>> >>> Suggested-by: Segher Boessenkool <segher@kernel.crashing.org> >>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> >> >> Applied to powerpc next, thanks. >> >> https://git.kernel.org/powerpc/c/6c5875843b87c3adea2beade9d1b8b3d4523900a >> >> cheers > > This patch causes a regression with clang:
Is that a Clang bug ?
Do you have a disassembly of the code both with and without this patch in order to compare ?
Segher, any idea ?
Christophe
> > https://travis-ci.com/ClangBuiltLinux/continuous-integration/jobs/213944668 > > I've attached my local bisect/build log. > > Cheers, > Nathan >
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